? 2007 fairchild semiconductor, all rights reserved high-speed, low-side gate drivers fairchilds offering the fan3000 series low-side gate drivers offer an unequaled combination of higher performance, smaller size, and more input options for driving n-channel power mosfets and igbts: ? industrys smallest packages (2 3 2 and 3 3 3mm mlp) ? choice of ttl or cmos input thresholds for all devices for best compatibility ? 2 inputs for each channel for design fexibility: either dual-input ( 1 and 2 logic), inverting and enable, or non-inverting and enable ? short and well-controlled time delays for 1mhz 1 switching, paralleling drivers, and optimizing drive timing to maximize effciency ? part of fairchilds total silicon solution for power supplies, backed by the global power resource?, a worldwide network of power supply design experts 40 different devices provide choices of 2a, 4a or 9a current ratings in single or dual-channel versions. in addition to the specifcations below, these drivers deliver fast switching and accurate timing to maximize effciency in high frequency power converter designs. ? millerdrive? architecture for the output stage, a bipolarCmosfet combination that provides the highest current during the miller plateau of the mosfet switching transition to minimize switching losses ? fail-safe inputs to hold the output low if an input signal is absent ? under-voltage lockout for predictable startup ? enable inputs which default to on if not connected ? industry-standard pin-outs ? thermal pads for heat removal (mlp packages) ? lead(pb)-free fnish specifcations for all* parameter value v dd to gnd, abs max 20v recommended v dd range 4.5v C 18v junction temperature, abs max 150c recommended ambient temperature C40c C 125c uvlo turn-on voltage 4v output propagation delay <20ns propagation matching between channels <2ns specifcations by current rating* typical applications ? switch-mode power supplies ? line drivers ? digital audio amplifers ? synchronous rectifer circuits ? dcCdc power converters ? any switching power mosfet or igbt * typical values unless noted, vdd = 12v, tj = C40c to 125c ** in development pwm in ? vdd vdd in ? vi n agnd gn d ou t in ? in ? agnd gn d ou t bia s f an310 0 fa n310 0 forward converter with hybrid synchronous rectifer parameter 2a 4a 9a** mid-voltage sink current/channel (amps) 2.5 4.3 9 mid-voltage source current/channel (amps) 1.7 2.8 6 peak sink current/channel (amps) 3 5 12 peak source current/channel (amps) 3 5 10 quiescent current, inputs disconnected (ma) 0.7 0.7 1.0 output rise/fall time (ns) for [load capacitance, nf] 13/9 [1] 12/9 [2.2] 20/18 [10] output reverse current withstand (ma) 500 500 1500
lit. no. 600523-001 high-speed, low-side gate drivers current rating is selected to achieve a desired switching time and switching loss for the total gate charge q g of the power switch. for each driver current rating, the table to the right shows the approximate minimum turn-on or turn- off time assuming no series gate-drive resistance (t sw,min =(q g /i rated ) x1.5, an empirical constant). input confguration single input plus enable ? inverting and enable ? non-inverting and enable ? enable defaults to high = on dual input ? inverting operation using in 2 (with in 1 held high) ? non-inverting operation using in 1 (with in 2 held low) ? other input can be enable in+ inC out 0 0 0 0 1 0 1 0 1 1 1 0 vdd in+ inC out gnd in vdd en out (or out) gnd input thresholds ttl (0.8v, 2.0v) ? for logic-level input signals, e.g., 3.3v or 5v ? for constant input thresholds as v dd varies ? most common choice cmos (~40% and 60% of v dd ) ? for noisy environments ? for ease of adding r-c time delays at driver input ? for input thresholds proportional to v dd package select for a maximum junction-to-lead thermal resistance of: r u jl, max = where: t j, max, op = maximum operating junction temperature 150c t l, max, op = maximum operating lead temperature maximum pcb temperature p pkg = average power dissipated in the package = v dd q g f sw minus the dissipation in the series gate resistance = i 2 g, rms r g (diffcult to estimate) f pcb = fraction of p pkg that fows into the pcb, e.g., 0.9 t j, max, op C t l, max, op p pkg f pcb channels current inputs per channel gnd pins package r u jl (c/w) part number (a) single 2a dual-input ( 1 and 2 ) 2 sot23-5 55 fan3100 x sx 2, 5 2x2mm mlp-6 3 fan3100 x mpx dual (b) 2a inverting and enable 3 soic-8 39 fan3226 x mx 3x3mm mlp-8 2 fan3226 x mpx non-inverting and enable soic-8 39 fan3227 x mx 3x3mm mlp-8 2 fan3227 x mpx dual-input ( 1 and 2 ) soic-8 39 fan3228 x mx 3x3mm mlp-8 2 fan3228 x mpx dual-input ( 1 an 8 soic-8 39 fan3229 x mx 3x3mm mlp-8 2 fan3229 x mpx dual 4a inverting and enable 3 soic-8 37 fan3223 x mx 3x3mm mlp-8 1 fan3223 x mpx non-inverting and enable soic-8 37 fan3224 x mx 3x3mm mlp-8 1 fan3224 x mpx dual-input ( 1 and 2 ) soic-8 37 fan3225 x mx 3x3mm mlp-8 1 fan3225 x mpx single 9a** inverting and enable 4, 5 soic-8 37 fan3121 x mx 3x3mm mlp-8 1 fan3121 x mpx non-inverting and enable soic-8 37 fan3122 x mx 3x3mm mlp-8 1 fan3122 x mpx (a) x = c or t for cmos or ttl input thresholds (b) channels may be paralleled to obtain a single 4a driver selection guide min. switching time (ns) q g for driver current rating (nc) 2a 4a 9a** 5 3.8 10 7.5 3.8 20 15 7.5 3.3 50 38 19 8.3 100 75 38 17 200 150 75 33 500 375 188 83 1000 750 375 167 12 10 8 6 4 2 0 4 6 8 1 0 1 2 1 4 1 6 1 8 2 0 v dd (v) input thresholds (v ) ttl input thresholds 12 10 8 6 4 2 0 4 6 8 1 0 1 2 1 4 1 6 1 8 2 0 v dd (v) input thresholds (v ) cmos input thresholds ** in development ** in development
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